The use of semiconductor integrated circuit chips for data storage, such as portable flash memory cards, is widespread. Users of these devices desire ever-increasing data storage capacity, and manufacturers strive to provide a large storage capacity in a cost-effective manner.
It is known to achieve an increased memory density within a single package by stacking multiple semiconductor chips or dice in a single package, known as a Multi-Chip Package (MCP). The increased number of dice provides a corresponding increase in storage capacity relative to a single die. Referring to FIG. 1, the MCP 100 consists of four NAND Flash memory dice 102. It should be understood that this method is equally applicable to other memory devices and to any number of stacked dice. Each die 102 has bonding pads 104 that are electrically connected via bonding wires 106 to a common substrate 108. Although the dice 102 are shown with bonding pads 104 on two opposite sides, it should be understood that each die 102 may alternatively have a different arrangement of bonding pads 104, for example on a single side, or on two adjacent sides, or any other arrangement. The substrate 108 provides further electrical connections from the bonding wires 106 to solder balls 110 on the opposite side of the substrate 108, forming a Ball Grid Array (BGA) for connection to an external device (not shown). An interposer 112 is provided between each pair of consecutive dice 102, to create a sufficient clearance therebetween to allow the attachment of the bonding wires 106 to the bonding pads 104. This arrangement has the drawback that the thickness of the interposers 112 limits the number of dice 102 that can be stacked within a package of fixed dimensions, thereby limiting the total storage capacity of the MCP 100. In addition, because each die 102 overhangs the bonding pads 104 of the lower dice 102, the bonding wires 106 for each die 102 must be attached prior to stacking the next die 102, resulting in an increased number of manufacturing steps and a time-consuming and labor-intensive assembly.
Another approach is shown in FIG. 2. The MCP 200 consists of four NAND Flash memory dice 202 with bonding pads 204 along one side. It should be understood that this method is equally applicable to other memory devices and to any number of stacked dice. This arrangement may alternatively be used with dice 202 having bonding pads 204 along two adjacent sides, as will be discussed below in further detail. The dice 202 are laterally offset from one another to expose the bonding pads 204 of each die 202. In this arrangement, all of the dice 202 can be stacked in a single step, and thereafter all of the bonding wires 206 can be attached in a single step by a wire bonding machine (not shown). This arrangement does not require interposers to provide access to the bonding pads 204, resulting in a more compact arrangement. This arrangement has the drawback that all of the bonding wires 206 for all dice 202 must be attached along a single side or two adjacent sides of the dice 202 and to the same surface of the substrate 208, because the bonding locations on the opposite side(s) of the dice 202 are covered by the dice 202 above. The resulting higher interconnect density may result in congestion and present logistic difficulties, particularly in devices such as HLNAND™ where each die 202 requires separate interconnect traces on the substrate 208. Alternatively, a reduced number of bonding wires 206 may be used, which may adversely affect the performance of the MCP 200. These drawbacks can be addressed to some extent by providing additional interconnection layers on the substrate 208, which can increase the cost of manufacture.
Another arrangement is shown in FIGS. 3 and 4. Referring to FIG. 3, the MCP 300 has one set of dice 302A in a first orientation and another set of dice 302B in a second orientation. It should be understood that this method is equally applicable to other memory devices and to any number of stacked dice. Each die 302 has bonding pads 304 along one side. The two orientations of the dice 302 allow a 50% reduction in the congestion of bonding wires 306. In FIG. 4, each die 402 is additionally offset in a second direction relative to the dice 302 of FIG. 3, thereby allowing a second set of bonding wires 406 to be connected to a second set of bonding pads 404 on a second side of each die 402, with an attendant increase in interconnect density. The second side is adjacent to the first side. However, in both MCPs 300 and 400 the sides 314, 414 of the dice 302, 402 opposite the bonding pads 304, 404 might not be usable for additional bonding pads. This may be the case even if the dimensions of the dice 302, 402 and any interposers results in a stack geometry such that the sides 314, 414 of the dice 302, 402 are not obstructed by other dice 302, 402 in the stack, for example because the overhanging sides 314, 414 of the dice 302, 402 lack the structural rigidity to withstand the wire bonding operation.
Therefore, there is a need for a Multi-Chip Package having reduced interconnect congestion.
There is also a need for a Multi-Chip Package having an increased number of interconnects per die.
There is also a need for a Multi-Chip Package having a compact arrangement.
There is also a need for a method of assembling a Multi-Chip Package having these characteristics.